1. Field of the Invention
The invention is related to a semiconductor storage device, and more particularly to programming (writing) a NAND-type flash memory.
2. Description of the Related Art
As a storage device, flash memory is widely used in electronic devices such as digital cameras and smart phones. In the market for flash memory, small size and large capacity are required, and high speed, and low power consumption are also required. Furthermore, consumers demand that flash memory have a certain number of data-rewritable times and data-retention characteristics.
A typical flash memory is formed by memory cells each with an N-type MOS structure. When electrons accumulate in the charge accumulation layer of the memory cell, the threshold voltage of the memory cell is shifted toward the positive direction, for example, the state is “0”. On the other hand, when electrons are released from the charge accumulation layer, the threshold voltage is shifted toward the negative direction, for example, the state is “1”. FIG. 1 shows the threshold voltage of the flash memory in the erase state and the write state, which shows the distribution width of the threshold voltage of the memory cell for “0” and “1”, and the threshold voltage of the memory cell is written under control within the distribution width.
Because there are variable factors such as variations in manufacturing process parameters and variations in time, the charge accumulation layer and the tunnel oxide film of each memory cell is not always uniform. In other words, electrons are easily injected into some memory cells, while they are injected into other memory cells with difficulty. When the same write voltage is applied to both memory cells, the shift amounts (variation) of the threshold voltage of the two memory cells are relatively different. Therefore, for example, when performing a page write, the accumulated electrons in some memory cells are sufficient to meet the distribution width of the threshold voltage for “0”, but the accumulated electrons in other memory cells are insufficient to meet the distribution width of the threshold voltage for “0”. Usually, by using program verification, a write voltage can again be applied to the memory cell with an insufficient injection of electrons, in order to meet the distribution width of the threshold voltage for “0”.
Japan Patent No. 3626221 discloses a flash memory which can narrow the distribution width of the threshold voltage of the memory cell, and can perform electron injection at high speed. In the flash memory, the write voltage is divided into a plurality of pulses, and applied to the gate of the memory cell. As shown in FIG. 2A, the Vpp pulse voltage first applied to the control gate is Vcgo, the write pulse is gradually increased by ΔVpp. The pulse width is a predetermined time Δt, and the maximum variation amount ΔVth of the threshold voltage of the memory cell in one operation for the electron injection is equal to ΔVpp. In addition, the write pulse as shown in FIG. 2B, each Vpp pulse has a fixed dVpp/dt, and merely raises ΔVpp continuously. Therefore, the floating gate potential can be substantially constant during the electron injection, and the degradation of the tunnel oxide film can be minimized.